Difference between revisions of "OpenCS"
From Hackstrich
(Cancelled, changing priorities, too much else going on.) |
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(12 intermediate revisions by the same user not shown) | |||
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== Status == | == Status == | ||
+ | * 2013-05: Too many other projects on the go, changing to dormant for now until I get some things done. | ||
+ | * 2013-02-03: Base for the transmit side of firmware is written but not yet tested. Receive side not written, and changing parameters not yet supported. | ||
+ | * 2013-02-02: Started working on firmware. | ||
+ | * 2013-01-30: Built first IO232 board, power up + programs OK, need to write firmware now. | ||
+ | * 2013-01-28: Ordered parts for the first IO232 board. | ||
+ | * 2012-12-31: IO232 board is here! Need to order parts and write a bunch of Verilog code to get this module working. | ||
+ | * 2012-12-25: Still waiting for board to arrive... | ||
+ | * 2012-12-05: IO232 board shipped. | ||
+ | * 2012-11: Submitted IO232 board. | ||
* 2012-10-25: Finished routing BACK4VS Rev001, 4-slot vertical single-sided backplane. Now just waiting to submit all 3 to OSH Park when I can fund it. | * 2012-10-25: Finished routing BACK4VS Rev001, 4-slot vertical single-sided backplane. Now just waiting to submit all 3 to OSH Park when I can fund it. | ||
* 2012-10-14: Finished routing CTLR Rev001, added mounting holes to be able to vertically stack IO232 and tagged Rev002. Backplane board still needs to be done. | * 2012-10-14: Finished routing CTLR Rev001, added mounting holes to be able to vertically stack IO232 and tagged Rev002. Backplane board still needs to be done. | ||
Line 26: | Line 35: | ||
** Probably CPLD-based makes the most sense | ** Probably CPLD-based makes the most sense | ||
− | [[Category: | + | == Revision 1 Issues == |
+ | === IO-232 === | ||
+ | * 1uF caps not on BOM | ||
+ | * Footprints for cap arrays have way too little exposed copper | ||
+ | * Status LED is backwards | ||
+ | |||
+ | == Commands == | ||
+ | * '''0x01 - MODULE IDENTIFY''' | ||
+ | ** No parameters | ||
+ | ** Response Byte 1 - Module Model ID | ||
+ | ** Response Byte 2 - Protocol version | ||
+ | ** Response Byte 3 - Firmware version high byte | ||
+ | ** Response Byte 4 - Firmware version low byte | ||
+ | * '''0x02 - PORT SEND DATA''' | ||
+ | ** Parameter Byte 1 - Bits 0-2 - Channel to address | ||
+ | ** Parameter Byte 1 - Bits 3-7 - How many bytes to send (max 32) | ||
+ | ** Parameter Bytes 2-X - Data to send | ||
+ | * '''0x03 - PORT MODE''' | ||
+ | ** Parameter Byte 1 - New port mode | ||
+ | *** 0x00 - Do not change | ||
+ | *** 0x01 - RS232 | ||
+ | ** Response Byte 1 - Updated port mode | ||
+ | * '''0x04 - PORT SPEED''' | ||
+ | ** Parameter Byte 1 - Baud rate | ||
+ | *** 0x00 - Do not change | ||
+ | *** 0x01 - 300 | ||
+ | *** 0x02 - 1200 | ||
+ | *** 0x03 - 2400 | ||
+ | *** 0x04 - 4800 | ||
+ | *** 0x05 - 9600 | ||
+ | *** 0x06 - 19200 | ||
+ | *** 0x07 - 38400 | ||
+ | *** 0x08 - 57600 | ||
+ | *** 0x09 - 115200 | ||
+ | *** 0x0A - 230400 | ||
+ | *** 0x0B - 460800 | ||
+ | *** 0x0C - 921600 | ||
+ | ** Response Byte 1 - Updated port speed | ||
+ | * '''0x06 - PORT DATABITS''' | ||
+ | ** Parameter Byte 1 - New number of data bits | ||
+ | *** 0x00 - Do not change | ||
+ | *** 0x01 - 5 | ||
+ | *** 0x02 - 6 | ||
+ | *** 0x03 - 7 | ||
+ | *** 0x04 - 8 | ||
+ | ** Response Byte 1 - Updated number of data bits | ||
+ | * '''0x07 - PORT PARITY''' | ||
+ | ** Parameter Byte 1 - New parity setting | ||
+ | *** 0x00 - Do not change | ||
+ | *** 0x01 - Even Parity | ||
+ | *** 0x02 - Odd Parity | ||
+ | *** 0x03 - Mark Parity | ||
+ | *** 0x04 - Space Parity | ||
+ | ** Response Byte 1 - Updated parity setting | ||
+ | * '''0x08 - PORT STOPBITS''' | ||
+ | ** Parameter Byte 1 - New number of stop bits | ||
+ | *** 0x00 - Do not change | ||
+ | *** 0x01 - 1 | ||
+ | *** 0x02 - 1.5 | ||
+ | *** 0x03 - 2 | ||
+ | ** Response Byte 1 - Updated number of stop bits | ||
+ | |||
+ | [[Category:Cancelled Projects]] |
Latest revision as of 15:02, 1 March 2017
OpenCS will be an open-hardware (and open-source) console server project.
Status
- 2013-05: Too many other projects on the go, changing to dormant for now until I get some things done.
- 2013-02-03: Base for the transmit side of firmware is written but not yet tested. Receive side not written, and changing parameters not yet supported.
- 2013-02-02: Started working on firmware.
- 2013-01-30: Built first IO232 board, power up + programs OK, need to write firmware now.
- 2013-01-28: Ordered parts for the first IO232 board.
- 2012-12-31: IO232 board is here! Need to order parts and write a bunch of Verilog code to get this module working.
- 2012-12-25: Still waiting for board to arrive...
- 2012-12-05: IO232 board shipped.
- 2012-11: Submitted IO232 board.
- 2012-10-25: Finished routing BACK4VS Rev001, 4-slot vertical single-sided backplane. Now just waiting to submit all 3 to OSH Park when I can fund it.
- 2012-10-14: Finished routing CTLR Rev001, added mounting holes to be able to vertically stack IO232 and tagged Rev002. Backplane board still needs to be done.
- 2012-10-09: Schematic for CTLR done, started routing board.
- 2012-10-08: Finished schematic/routing/CAM for IO232. Working on CTLR now.
- 2012-10: Started putting design together
Specs
- 1U rack-mount chassis with 8 slots (4 front, 4 back) connected by an internal backplane
- Slots will ideally all be equivalent so users can put power/ports where they want them, can be filled with:
- a PSU (up to two per system)
- a controller (up to two per system)
- an expansion module (lets you chain more chassis, up to two per system)
- an I/O module (gives you serial ports)
- Slots will ideally all be equivalent so users can put power/ports where they want them, can be filled with:
- SPI between modules with module select pins shifted by one by the backplane for each slot
- Fully-expanded base chassis would be two PSUs, two controllers, and 4x 8-port RS232 modules.
- 2 controllers + 4 I/O modules + 2 PSUs in the base
- 4 I/O modules in each expansion unit, up to 3 expansion units
- Each slot on the base gets 4 module select lines, which it can use or give to another chassis
- Total of 4*8 = 32 select lines needed
- Controllers will have an Ethernet port and two serial ports on them (console/aux)
- Probably PIC32-based makes the most sense
- I/O modules will have up to 8 serial ports on them
- Probably CPLD-based makes the most sense
Revision 1 Issues
IO-232
- 1uF caps not on BOM
- Footprints for cap arrays have way too little exposed copper
- Status LED is backwards
Commands
- 0x01 - MODULE IDENTIFY
- No parameters
- Response Byte 1 - Module Model ID
- Response Byte 2 - Protocol version
- Response Byte 3 - Firmware version high byte
- Response Byte 4 - Firmware version low byte
- 0x02 - PORT SEND DATA
- Parameter Byte 1 - Bits 0-2 - Channel to address
- Parameter Byte 1 - Bits 3-7 - How many bytes to send (max 32)
- Parameter Bytes 2-X - Data to send
- 0x03 - PORT MODE
- Parameter Byte 1 - New port mode
- 0x00 - Do not change
- 0x01 - RS232
- Response Byte 1 - Updated port mode
- Parameter Byte 1 - New port mode
- 0x04 - PORT SPEED
- Parameter Byte 1 - Baud rate
- 0x00 - Do not change
- 0x01 - 300
- 0x02 - 1200
- 0x03 - 2400
- 0x04 - 4800
- 0x05 - 9600
- 0x06 - 19200
- 0x07 - 38400
- 0x08 - 57600
- 0x09 - 115200
- 0x0A - 230400
- 0x0B - 460800
- 0x0C - 921600
- Response Byte 1 - Updated port speed
- Parameter Byte 1 - Baud rate
- 0x06 - PORT DATABITS
- Parameter Byte 1 - New number of data bits
- 0x00 - Do not change
- 0x01 - 5
- 0x02 - 6
- 0x03 - 7
- 0x04 - 8
- Response Byte 1 - Updated number of data bits
- Parameter Byte 1 - New number of data bits
- 0x07 - PORT PARITY
- Parameter Byte 1 - New parity setting
- 0x00 - Do not change
- 0x01 - Even Parity
- 0x02 - Odd Parity
- 0x03 - Mark Parity
- 0x04 - Space Parity
- Response Byte 1 - Updated parity setting
- Parameter Byte 1 - New parity setting
- 0x08 - PORT STOPBITS
- Parameter Byte 1 - New number of stop bits
- 0x00 - Do not change
- 0x01 - 1
- 0x02 - 1.5
- 0x03 - 2
- Response Byte 1 - Updated number of stop bits
- Parameter Byte 1 - New number of stop bits