Difference between revisions of "Terasic DE1"
From Hackstrich
(Added SRAM pins.) |
(Fixed table headers.) |
||
| (2 intermediate revisions by the same user not shown) | |||
| Line 1: | Line 1: | ||
The Terasic DE1 is an Altera FPGA development board. | The Terasic DE1 is an Altera FPGA development board. | ||
| + | = Pin Mapping = | ||
| + | |||
| + | == Switches == | ||
{| class="wikitable sortable" border="1" | {| class="wikitable sortable" border="1" | ||
| + | |+ Switches | ||
!Function | !Function | ||
!FPGA Pin | !FPGA Pin | ||
| Line 46: | Line 50: | ||
|Pushbutton 3 | |Pushbutton 3 | ||
|PIN_T21 | |PIN_T21 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == LEDs == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ LEDs | ||
| + | !Function | ||
| + | !FPGA Pin | ||
|- | |- | ||
|LED Red 0 | |LED Red 0 | ||
| Line 100: | Line 112: | ||
|LED Green 7 | |LED Green 7 | ||
|PIN_Y21 | |PIN_Y21 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == 7-segment Displays == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ 7-segment Displays | ||
| + | !Function | ||
| + | !FPGA Pin | ||
|- | |- | ||
|Seven Segment Digit 0 Segment 0 | |Seven Segment Digit 0 Segment 0 | ||
| Line 185: | Line 205: | ||
|PIN_D4 | |PIN_D4 | ||
|- | |- | ||
| − | | | + | |} |
| − | + | ||
| − | + | == VGA == | |
| − | + | {| class="wikitable sortable" border="1" | |
| − | | | + | |+ VGA |
| − | | | + | !Function |
| − | + | !FPGA Pin | |
| − | |||
|- | |- | ||
|VGA Red 0 | |VGA Red 0 | ||
| Line 235: | Line 254: | ||
|VGA Sync V | |VGA Sync V | ||
|PIN_B11 | |PIN_B11 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == Audio CODEC == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ Audio CODEC | ||
| + | !Function | ||
| + | !FPGA Pin | ||
|- | |- | ||
|Audio CODEC ADC LR Clock | |Audio CODEC ADC LR Clock | ||
| Line 259: | Line 286: | ||
|Audio CODEC I2C Clock | |Audio CODEC I2C Clock | ||
|PIN_B3 | |PIN_B3 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == Clock/Serial Comms == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ Clock/Serial Comms | ||
| + | !Function | ||
| + | !FPGA Pin | ||
| + | |- | ||
| + | |Clock 24MHz (from USB Blaster) | ||
| + | |PIN_A12, PIN_B12 | ||
| + | |- | ||
| + | |Clock 27MHz | ||
| + | |PIN_D12, PIN_E12 | ||
| + | |- | ||
| + | |Clock 50MHz | ||
| + | |PIN_L1 | ||
|- | |- | ||
|RS232 Receive | |RS232 Receive | ||
| Line 271: | Line 315: | ||
|PS/2 Data | |PS/2 Data | ||
|PIN_J14 | |PIN_J14 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == SDRAM == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ SDRAM | ||
| + | !Function | ||
| + | !FPGA Pin | ||
|- | |- | ||
|SDRAM Address 0 | |SDRAM Address 0 | ||
| Line 385: | Line 437: | ||
|SDRAM Chip Select | |SDRAM Chip Select | ||
|PIN_T6 | |PIN_T6 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == SRAM == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ SRAM | ||
| + | !Function | ||
| + | !FPGA Pin | ||
|- | |- | ||
|SRAM Address 0 | |SRAM Address 0 | ||
| Line 502: | Line 562: | ||
|SRAM Chip Enable | |SRAM Chip Enable | ||
|PIN_AB5 | |PIN_AB5 | ||
| + | |- | ||
| + | |} | ||
| + | |||
| + | == Flash == | ||
| + | {| class="wikitable sortable" border="1" | ||
| + | |+ Flash | ||
| + | !Function | ||
| + | !FPGA Pin | ||
| + | |- | ||
| + | |Flash Address 0 | ||
| + | |PIN_AB20 | ||
| + | |- | ||
| + | |Flash Address 1 | ||
| + | |PIN_AA14 | ||
| + | |- | ||
| + | |Flash Address 2 | ||
| + | |PIN_Y16 | ||
| + | |- | ||
| + | |Flash Address 3 | ||
| + | |PIN_R15 | ||
| + | |- | ||
| + | |Flash Address 4 | ||
| + | |PIN_T15 | ||
| + | |- | ||
| + | |Flash Address 5 | ||
| + | |PIN_U15 | ||
| + | |- | ||
| + | |Flash Address 6 | ||
| + | |PIN_V15 | ||
| + | |- | ||
| + | |Flash Address 7 | ||
| + | |PIN_W15 | ||
| + | |- | ||
| + | |Flash Address 8 | ||
| + | |PIN_R14 | ||
| + | |- | ||
| + | |Flash Address 9 | ||
| + | |PIN_Y13 | ||
| + | |- | ||
| + | |Flash Address 10 | ||
| + | |PIN_R12 | ||
| + | |- | ||
| + | |Flash Address 11 | ||
| + | |PIN_T12 | ||
| + | |- | ||
| + | |Flash Address 12 | ||
| + | |PIN_AB14 | ||
| + | |- | ||
| + | |Flash Address 13 | ||
| + | |PIN_AA13 | ||
| + | |- | ||
| + | |Flash Address 14 | ||
| + | |PIN_AB13 | ||
| + | |- | ||
| + | |Flash Address 15 | ||
| + | |PIN_AA12 | ||
| + | |- | ||
| + | |Flash Address 16 | ||
| + | |PIN_AB12 | ||
| + | |- | ||
| + | |Flash Address 17 | ||
| + | |PIN_AA20 | ||
| + | |- | ||
| + | |Flash Address 18 | ||
| + | |PIN_U14 | ||
| + | |- | ||
| + | |Flash Address 19 | ||
| + | |PIN_V14 | ||
| + | |- | ||
| + | |Flash Address 20 | ||
| + | |PIN_U13 | ||
| + | |- | ||
| + | |Flash Address 21 | ||
| + | |PIN_R13 | ||
| + | |- | ||
| + | |Flash Data 0 | ||
| + | |PIN_AB16 | ||
| + | |- | ||
| + | |Flash Data 1 | ||
| + | |PIN_AA16 | ||
| + | |- | ||
| + | |Flash Data 2 | ||
| + | |PIN_AB17 | ||
| + | |- | ||
| + | |Flash Data 3 | ||
| + | |PIN_AA17 | ||
| + | |- | ||
| + | |Flash Data 4 | ||
| + | |PIN_AB18 | ||
| + | |- | ||
| + | |Flash Data 5 | ||
| + | |PIN_AA18 | ||
| + | |- | ||
| + | |Flash Data 6 | ||
| + | |PIN_AB19 | ||
| + | |- | ||
| + | |Flash Data 7 | ||
| + | |PIN_AA19 | ||
| + | |- | ||
| + | |Flash Output Enable | ||
| + | |PIN_AA15 | ||
| + | |- | ||
| + | |Flash Reset | ||
| + | |PIN_W14 | ||
| + | |- | ||
| + | |Flash Write Enable | ||
| + | |PIN_Y14 | ||
|- | |- | ||
|} | |} | ||
[[Category:Products]] | [[Category:Products]] | ||
Latest revision as of 02:28, 13 June 2011
The Terasic DE1 is an Altera FPGA development board.
Contents
Pin Mapping
Switches
| Function | FPGA Pin |
|---|---|
| Toggle 0 | PIN_L22 |
| Toggle 1 | PIN_L21 |
| Toggle 2 | PIN_M22 |
| Toggle 3 | PIN_V12 |
| Toggle 4 | PIN_W12 |
| Toggle 5 | PIN_U12 |
| Toggle 6 | PIN_U11 |
| Toggle 7 | PIN_M2 |
| Toggle 8 | PIN_M1 |
| Toggle 9 | PIN_L2 |
| Pushbutton 0 | PIN_R22 |
| Pushbutton 1 | PIN_R21 |
| Pushbutton 2 | PIN_T22 |
| Pushbutton 3 | PIN_T21 |
LEDs
| Function | FPGA Pin |
|---|---|
| LED Red 0 | PIN_R20 |
| LED Red 1 | PIN_R19 |
| LED Red 2 | PIN_U19 |
| LED Red 3 | PIN_Y19 |
| LED Red 4 | PIN_T18 |
| LED Red 5 | PIN_V19 |
| LED Red 6 | PIN_Y18 |
| LED Red 7 | PIN_U18 |
| LED Red 8 | PIN_R18 |
| LED Red 9 | PIN_R17 |
| LED Green 0 | PIN_U22 |
| LED Green 1 | PIN_U21 |
| LED Green 2 | PIN_V22 |
| LED Green 3 | PIN_V21 |
| LED Green 4 | PIN_W22 |
| LED Green 5 | PIN_W21 |
| LED Green 6 | PIN_Y22 |
| LED Green 7 | PIN_Y21 |
7-segment Displays
| Function | FPGA Pin |
|---|---|
| Seven Segment Digit 0 Segment 0 | PIN_J2 |
| Seven Segment Digit 0 Segment 1 | PIN_J1 |
| Seven Segment Digit 0 Segment 2 | PIN_H2 |
| Seven Segment Digit 0 Segment 3 | PIN_H1 |
| Seven Segment Digit 0 Segment 4 | PIN_F2 |
| Seven Segment Digit 0 Segment 5 | PIN_F1 |
| Seven Segment Digit 0 Segment 6 | PIN_E2 |
| Seven Segment Digit 1 Segment 0 | PIN_E1 |
| Seven Segment Digit 1 Segment 1 | PIN_H6 |
| Seven Segment Digit 1 Segment 2 | PIN_H5 |
| Seven Segment Digit 1 Segment 3 | PIN_H4 |
| Seven Segment Digit 1 Segment 4 | PIN_G3 |
| Seven Segment Digit 1 Segment 5 | PIN_D2 |
| Seven Segment Digit 1 Segment 6 | PIN_D1 |
| Seven Segment Digit 2 Segment 0 | PIN_G5 |
| Seven Segment Digit 2 Segment 1 | PIN_G6 |
| Seven Segment Digit 2 Segment 2 | PIN_C2 |
| Seven Segment Digit 2 Segment 3 | PIN_C1 |
| Seven Segment Digit 2 Segment 4 | PIN_E3 |
| Seven Segment Digit 2 Segment 5 | PIN_E4 |
| Seven Segment Digit 2 Segment 6 | PIN_D3 |
| Seven Segment Digit 3 Segment 0 | PIN_F4 |
| Seven Segment Digit 3 Segment 1 | PIN_D5 |
| Seven Segment Digit 3 Segment 2 | PIN_D6 |
| Seven Segment Digit 3 Segment 3 | PIN_J4 |
| Seven Segment Digit 3 Segment 4 | PIN_L8 |
| Seven Segment Digit 3 Segment 5 | PIN_F3 |
| Seven Segment Digit 3 Segment 6 | PIN_D4 |
VGA
| Function | FPGA Pin |
|---|---|
| VGA Red 0 | PIN_D9 |
| VGA Red 1 | PIN_C9 |
| VGA Red 2 | PIN_A7 |
| VGA Red 3 | PIN_B7 |
| VGA Green 0 | PIN_B8 |
| VGA Green 1 | PIN_C10 |
| VGA Green 2 | PIN_B9 |
| VGA Green 3 | PIN_A8 |
| VGA Blue 0 | PIN_A9 |
| VGA Blue 1 | PIN_D11 |
| VGA Blue 2 | PIN_A10 |
| VGA Blue 3 | PIN_B10 |
| VGA Sync H | PIN_A11 |
| VGA Sync V | PIN_B11 |
Audio CODEC
| Function | FPGA Pin |
|---|---|
| Audio CODEC ADC LR Clock | PIN_A6 |
| Audio CODEC ADC Data | PIN_B6 |
| Audio CODEC DAC LR Clock | PIN_A5 |
| Audio CODEC DAC LR Clock | PIN_B5 |
| Audio CODEC Chip Clock | PIN_B4 |
| Audio CODEC Bit-Stream Clock | PIN_A4 |
| Audio CODEC I2C Data | PIN_A3 |
| Audio CODEC I2C Clock | PIN_B3 |
Clock/Serial Comms
| Function | FPGA Pin |
|---|---|
| Clock 24MHz (from USB Blaster) | PIN_A12, PIN_B12 |
| Clock 27MHz | PIN_D12, PIN_E12 |
| Clock 50MHz | PIN_L1 |
| RS232 Receive | PIN_F14 |
| RS232 Transmit | PIN_G12 |
| PS/2 Clock | PIN_H15 |
| PS/2 Data | PIN_J14 |
SDRAM
| Function | FPGA Pin |
|---|---|
| SDRAM Address 0 | PIN_W4 |
| SDRAM Address 1 | PIN_W5 |
| SDRAM Address 2 | PIN_Y3 |
| SDRAM Address 3 | PIN_Y4 |
| SDRAM Address 4 | PIN_R6 |
| SDRAM Address 5 | PIN_R5 |
| SDRAM Address 6 | PIN_P6 |
| SDRAM Address 7 | PIN_P5 |
| SDRAM Address 8 | PIN_P3 |
| SDRAM Address 9 | PIN_N4 |
| SDRAM Address 10 | PIN_W3 |
| SDRAM Address 11 | PIN_N6 |
| SDRAM Data 0 | PIN_U1 |
| SDRAM Data 1 | PIN_U2 |
| SDRAM Data 2 | PIN_V1 |
| SDRAM Data 3 | PIN_V2 |
| SDRAM Data 4 | PIN_W1 |
| SDRAM Data 5 | PIN_W2 |
| SDRAM Data 6 | PIN_Y1 |
| SDRAM Data 7 | PIN_Y2 |
| SDRAM Data 8 | PIN_N1 |
| SDRAM Data 9 | PIN_N2 |
| SDRAM Data 10 | PIN_P1 |
| SDRAM Data 11 | PIN_P2 |
| SDRAM Data 12 | PIN_R1 |
| SDRAM Data 13 | PIN_R2 |
| SDRAM Data 14 | PIN_T1 |
| SDRAM Data 15 | PIN_T2 |
| SDRAM Bank Address 0 | PIN_U3 |
| SDRAM Bank Address 1 | PIN_V4 |
| SDRAM Low-byte Data Mask | PIN_R7 |
| SDRAM High-byte Data Mask | PIN_M5 |
| SDRAM Row Address Strobe | PIN_T5 |
| SDRAM Column Address Strobe | PIN_T3 |
| SDRAM Clock Enable | PIN_N3 |
| SDRAM Clock | PIN_U4 |
| SDRAM Write Enable | PIN_R8 |
| SDRAM Chip Select | PIN_T6 |
SRAM
| Function | FPGA Pin |
|---|---|
| SRAM Address 0 | PIN_AA3 |
| SRAM Address 1 | PIN_AB3 |
| SRAM Address 2 | PIN_AA4 |
| SRAM Address 3 | PIN_AB4 |
| SRAM Address 4 | PIN_A5 |
| SRAM Address 5 | PIN_AB10 |
| SRAM Address 6 | PIN_AA11 |
| SRAM Address 7 | PIN_AB11 |
| SRAM Address 8 | PIN_V11 |
| SRAM Address 9 | PIN_W11 |
| SRAM Address 10 | PIN_R11 |
| SRAM Address 11 | PIN_T11 |
| SRAM Address 12 | PIN_Y10 |
| SRAM Address 13 | PIN_U10 |
| SRAM Address 14 | PIN_R10 |
| SRAM Address 15 | PIN_T7 |
| SRAM Address 16 | PIN_Y6 |
| SRAM Address 17 | PIN_Y5 |
| SRAM Data 0 | PIN_AA6 |
| SRAM Data 1 | PIN_AB6 |
| SRAM Data 2 | PIN_AA7 |
| SRAM Data 3 | PIN_AB7 |
| SRAM Data 4 | PIN_AA8 |
| SRAM Data 5 | PIN_AB8 |
| SRAM Data 6 | PIN_AA9 |
| SRAM Data 7 | PIN_AB9 |
| SRAM Data 8 | PIN_Y9 |
| SRAM Data 9 | PIN_W9 |
| SRAM Data 10 | PIN_V9 |
| SRAM Data 11 | PIN_U9 |
| SRAM Data 12 | PIN_R9 |
| SRAM Data 13 | PIN_W8 |
| SRAM Data 14 | PIN_V8 |
| SRAM Data 15 | PIN_U8 |
| SRAM Write Enable | PIN_AA10 |
| SRAM Output Enable | PIN_T8 |
| SRAM High-byte Data Mask | PIN_W7 |
| SRAM Low-byte Data Mask | PIN_Y7 |
| SRAM Chip Enable | PIN_AB5 |
Flash
| Function | FPGA Pin |
|---|---|
| Flash Address 0 | PIN_AB20 |
| Flash Address 1 | PIN_AA14 |
| Flash Address 2 | PIN_Y16 |
| Flash Address 3 | PIN_R15 |
| Flash Address 4 | PIN_T15 |
| Flash Address 5 | PIN_U15 |
| Flash Address 6 | PIN_V15 |
| Flash Address 7 | PIN_W15 |
| Flash Address 8 | PIN_R14 |
| Flash Address 9 | PIN_Y13 |
| Flash Address 10 | PIN_R12 |
| Flash Address 11 | PIN_T12 |
| Flash Address 12 | PIN_AB14 |
| Flash Address 13 | PIN_AA13 |
| Flash Address 14 | PIN_AB13 |
| Flash Address 15 | PIN_AA12 |
| Flash Address 16 | PIN_AB12 |
| Flash Address 17 | PIN_AA20 |
| Flash Address 18 | PIN_U14 |
| Flash Address 19 | PIN_V14 |
| Flash Address 20 | PIN_U13 |
| Flash Address 21 | PIN_R13 |
| Flash Data 0 | PIN_AB16 |
| Flash Data 1 | PIN_AA16 |
| Flash Data 2 | PIN_AB17 |
| Flash Data 3 | PIN_AA17 |
| Flash Data 4 | PIN_AB18 |
| Flash Data 5 | PIN_AA18 |
| Flash Data 6 | PIN_AB19 |
| Flash Data 7 | PIN_AA19 |
| Flash Output Enable | PIN_AA15 |
| Flash Reset | PIN_W14 |
| Flash Write Enable | PIN_Y14 |
