Difference between revisions of "StrichLux"
From Hackstrich
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== Project Log == | == Project Log == | ||
+ | * 2012-03-17: Completed BOM, schematic, and layout for [[StrichLux/IO-DMX|DMX I/O module]] and [[StrichLux/IO-Breakout|I/O Breakout module]]. Both submitted to Laen for PCB manufacturing. | ||
* 2012-03-13: Defined I/O Link connector pinout, started putting together BOM/schematic for [[StrichLux/IO-DMX|DMX I/O module]]. | * 2012-03-13: Defined I/O Link connector pinout, started putting together BOM/schematic for [[StrichLux/IO-DMX|DMX I/O module]]. | ||
* 2012-03-12: Chose connectors, laid out basic core board interface components/defined sizes. | * 2012-03-12: Chose connectors, laid out basic core board interface components/defined sizes. |
Revision as of 03:41, 18 March 2012
The Modular Lighting Controller will control various kinds of lighting via various protocols/interfaces, or convert between two of the supported protocols/interfaces without directly controlling any devices.
Project Log
- 2012-03-17: Completed BOM, schematic, and layout for DMX I/O module and I/O Breakout module. Both submitted to Laen for PCB manufacturing.
- 2012-03-13: Defined I/O Link connector pinout, started putting together BOM/schematic for DMX I/O module.
- 2012-03-12: Chose connectors, laid out basic core board interface components/defined sizes.
- 2012-03-06 - 2012-03-11: Defining specs, searching for appropriate parts.
Project Ideas
- Core Board, lets you plug in up to 4 input modules and 4 output modules plus an optional Power Module
- Each of the 4 would be up to one DMX universe worth of channels (512)
- SPI slave to each I/O module, 8 SPI slave transceivers total
- RS232 for troubleshooting and configuring the core board itself
- Local framebuffer memory
- Dual-port memory would be best so the output and input sections can both deal with it independently
- 8 bits per frame * 512 channels per universe * 4 universes = 16kbit (2kbyte) of framebuffer memory required
- Twice that for double-buffering would be awesome, so 32kbit/4kbyte of dual-port memory wanted
- Split into 4 channels, so each block would be 8kbit/1kbyte
- Reading/writing needs to happen in parallel for each block
- CPLD/FPGA seems a great fit for this
- Lattice LFXP2-5E-5TN144C or Xilinx XC3S50-4VQG100C both seem like good fits
- Since this will likely be the most powerful chip in the whole system, we could do transforms here to to take the load off the I/O modules
- HSV->RGB
- Input splitting (one input channel goes to two or more output channels)
- Input combining (two or more input channels get combined via some function and go to a single output channel)
- Scaling/offsetting (0-255 in = 32-64 out or such)
- Power Modules
- Stack underneath the Core Board, provide high-power busses for directly powering lighting from the system.
- Location makes sense because it doesn't block hot-swapping the I/O modules, but may be a thermal problem as it will get hot and heat up the Core Board
- Input-Only Modules
- Analog input channels (not 512 though, likely)
- Output-Only Modules
- LPD8806 LED strips
- Other LED strips
- Discrete power switches (relays/FETs/whatever)
- I/O Modules
- Art-Net over Ethernet
- Art-Net over WiFi
- DMX
- Dimensions
- Core board will be 3.95" x 6.25" (max limits of EAGLE Standard, will need to purchase)
- Modules will be 1.525" x 1.925" (2x4 layout on the board for input/output x 4 channels)