Difference between revisions of "StrichLux"
From Hackstrich
(More thoughts on the core architecture.) |
(FPGAs) |
||
| Line 4: | Line 4: | ||
* Core board, lets you plug in up to 4 input modules and 4 output modules | * Core board, lets you plug in up to 4 input modules and 4 output modules | ||
** Each of the 4 would be up to one DMX universe worth of channels (512) | ** Each of the 4 would be up to one DMX universe worth of channels (512) | ||
| − | |||
** SPI to each I/O module, 8 SPI transceivers total | ** SPI to each I/O module, 8 SPI transceivers total | ||
** RS232 for troubleshooting the core board itself | ** RS232 for troubleshooting the core board itself | ||
| Line 13: | Line 12: | ||
*** Split into 4 channels, so each block would be 8kbit/1kbyte | *** Split into 4 channels, so each block would be 8kbit/1kbyte | ||
*** Reading/writing needs to happen in parallel for each block | *** Reading/writing needs to happen in parallel for each block | ||
| + | ** CPLD/FPGA seems a great fit for this | ||
| + | *** Lattice LFXP2-5E-5TN144C or Xilinx XC3S50-4VQG100C both seem like good fits | ||
* Inputs | * Inputs | ||
** Art-Net over Ethernet | ** Art-Net over Ethernet | ||
Revision as of 15:25, 7 March 2012
The Modular Lighting Controller will control various kinds of lighting via various protocols/interfaces, or convert between two of the supported protocols/interfaces without directly controlling any devices.
Project Ideas
- Core board, lets you plug in up to 4 input modules and 4 output modules
- Each of the 4 would be up to one DMX universe worth of channels (512)
- SPI to each I/O module, 8 SPI transceivers total
- RS232 for troubleshooting the core board itself
- Local framebuffer memory
- Dual-port memory would be best so the output and input sections can both deal with it independently
- 8 bits per frame * 512 channels per universe * 4 universes = 16kbit (2kbyte) of framebuffer memory required
- Twice that for double-buffering would be awesome, so 32kbit/4kbyte of dual-port memory wanted
- Split into 4 channels, so each block would be 8kbit/1kbyte
- Reading/writing needs to happen in parallel for each block
- CPLD/FPGA seems a great fit for this
- Lattice LFXP2-5E-5TN144C or Xilinx XC3S50-4VQG100C both seem like good fits
- Inputs
- Art-Net over Ethernet
- Art-Net over WiFi
- DMX
- Analog input channels (not 512 though, likely)
- Outputs
- LPD8806 LED strips
- Other LED strips
- Art-Net over Ethernet
- Art-Net over WiFi
- DMX
- Discrete power switches (relays/FETs/whatever)
