Difference between revisions of "PoE Shield"
From Hackstrich
(Made some changes to move towards rev. 2.) |
(→Notes from Rev. 1 (SVN r51)) |
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* R9 should be 0.33Ω, not 33Ω. Need to recalculate this for revision 2 based on max allowed current draw | * R9 should be 0.33Ω, not 33Ω. Need to recalculate this for revision 2 based on max allowed current draw | ||
** R9 at 1Ω (through hole) regulates alright at relatively low load. | ** R9 at 1Ω (through hole) regulates alright at relatively low load. | ||
| − | * Fixed in revision 2: <s>Feedback resistors R16/R17 are backwards (i think), need to flip them/retest - Flipped, correctly limits to 11.8V with zero load. | + | * Fixed in revision 2: <s>Feedback resistors R16/R17 are backwards (i think), need to flip them/retest</s> - Flipped, correctly limits to 11.8V with zero load. |
* <s>Under 100mA load regulation is not correct. (This follows the R16/R17 swap.)</s> Fixed by swapping R9 0.33Ω loop of wire for 1Ω through-hole resistor. See note about 1Ω resistor. | * <s>Under 100mA load regulation is not correct. (This follows the R16/R17 swap.)</s> Fixed by swapping R9 0.33Ω loop of wire for 1Ω through-hole resistor. See note about 1Ω resistor. | ||
* CS Resistor/Capacitor Filter needs to be right next to LM5070 to minimize induced noise. | * CS Resistor/Capacitor Filter needs to be right next to LM5070 to minimize induced noise. | ||
Revision as of 12:05, 3 December 2010
The PoE shield will be compatible software-wise with the official Arduino Ethernet Shield, but also supply power to the board via 802.3af-2003 compliant Power over Ethernet.
Project Status
Design, BOM, schematic, and PCB layout complete, PCBs and parts received, revision 1 board assembly is in progress. Power side assembly done, data side done except bypass caps and the Wiznet controller IC. Power supply side is outputting a well-regulated ~12v (stays in regulation under 100/300mA load), data side assembly now in progress. Soldering the W5100 TQFP/SQFP80 is harder than expected.
Notes
Notes from Rev. 1 (SVN r51)
- Package has silkscreen already, just none on bottom of rev. 1 boards:
For LM5070 library part put a notation for where pin 1 goes. - Fixed in revision 2:
C6 footprint does not match BoM (C6 should be 0603 or footprint to 1210) - D2 has no silkscreen
- Fix footprint on U2 (Pads are too far apart lengthwise)
- Fix footprint for U3 (it's just generally wrong)
- U3 pinout was wrong (all of the pins were in the wrong place)
- Bigger test points (especially for prototypes), through hole especially.
- Fixed in revision 2:
R108 footprint is 0603 but BOM is 0402) - Had wrong PoE transformer (1x3.3v 1x5v windings instead of 2x12v)
- R9 should be 0.33Ω, not 33Ω. Need to recalculate this for revision 2 based on max allowed current draw
- R9 at 1Ω (through hole) regulates alright at relatively low load.
- Fixed in revision 2:
Feedback resistors R16/R17 are backwards (i think), need to flip them/retest- Flipped, correctly limits to 11.8V with zero load. Under 100mA load regulation is not correct. (This follows the R16/R17 swap.)Fixed by swapping R9 0.33Ω loop of wire for 1Ω through-hole resistor. See note about 1Ω resistor.- CS Resistor/Capacitor Filter needs to be right next to LM5070 to minimize induced noise.
- INT jumper has no silkscreen.
Ideas for Rev. 2
- Could switch the main transformer to a POE13W3VERS-R (1.8/3.3/7V) or 7491192912 (3.3/5/12V) to avoid the need for secondary regulation all together
